Scheda programma d'esame
MICROELECTRONIC TECHNOLOGIES
FRANCESCO PIERI
Academic year2017/18
CourseELECTRONIC ENGINEERING
Code318II
Credits6
PeriodSemester 1
LanguageItalian

ModulesAreaTypeHoursTeacher(s)
TECNOLOGIE MICROELETTRONICHEING-INF/01LEZIONI60
ANDREA NANNINI unimap
FRANCESCO PIERI unimap
Programma non disponibile nella lingua selezionata
Learning outcomes
Knowledge

Upon successful completion of the course, the student:

  • will know a typical process sequence for CMOS fabrication.
  • will have a general knowledge of the techniques used in the fabrication of integrated circuits (ICs)
  • will possess a knowledge of the physics of the most common fabrication steps (thin film deposition, UV lithography, etching, etc.) and of the structure of the corresponding fabrication systems
  • will know how each process is integrated in an IC fabrication sequence.
  • will know the basic electrical characterization techniques used in the microelectronics industry.
Assessment criteria of knowledge

Knowledge will be assessed in exercises presented during the course and in the final exam.

Skills

Upon successful completion of the course, the student:

  • will be able to describe the fabrication sequence of a CMOS IC
  • will be able do determine the impact of process parameters on the properties (geometry, composition, doping profile, etc.) of the fabricated structures
  • will be able to compare the available technical options for the different IC fabrication steps (doping, deposition, etching, etc.)
  • will be able to compare different techniques for the electrical characterization of microelectronics materials and components
Assessment criteria of skills

Skills will be assessed in exercises presented during the course and in the final exam.

Behaviors

Upon successful completion of the course, the student should acquire a technical sensibility on the potentials and limits of present electronic integrated components, as imposed by the current technological constraints.

Assessment criteria of behaviors

Behaviors will be assessed in exercises presented during the course and in the final exam.

Prerequisites

For effective attendance of the course, the student is required to have:

  • a basic knowledge of semiconductor physics (energy bands, doping, current transport, etc.)
  • an understanding of the physics of semiconductor devices (pn junctions, metal-semiconductor junctions, MOSFETs, BJTs)
  • Basic notions of chemistry
Teaching methods

Teaching method: face-to-face delivered lectures. Delivery is in Italian. A large part of the material will be presented through slides that will be made available through the course web page. For an effective attendance, student presence at the lecture is advised.

Syllabus

Generalities on the fabrication of integrated circuits (ICs). The CMOS technology fabrication sequence. Growth of Silicon crystals, silicon wafer fabrication. Thermal oxidation of silicon, oxide growth models, thin oxides. Semiconductor doping: diffusion, ion implantation. Thin film deposition by Chemical Vapor Deposition (CVD), thermal evaporation, sputtering. Ultraviolet (UV) lithography. Thin film etching: wet etching, plasma etching. Vacuum systems. Clean rooms. Aspects of process integration: CMOS, Bipolar, MEMS technologies. IC Packaging. Characterization: measurement of resistivity, sheet resistance, doping profiles, contact resistance by electrical and non-electrical techniques.

Bibliography

J.D. Plummer, M.D. Deal, P.D. Griffin: Silicon VLSI Technology: Fundamentals, Practice, and Modeling

D.K. Schroeder: Semiconductor Material and Device Characterization

S. Wolf, R.N. Tauber: Silicon Processing for the VLSI Era, Vol. 1: Process Technology.

Assessment methods

Method: Final oral exam (100%)

In the final oral exam (30 minutes to 1 hour), the student will be required to present in an organized and clear manner the physical and technical aspects of the most important fabrication steps in a microelectronics fabrication sequence, by exposing the main options available to the process engineer and how each technical choice impacts the overall structure of the final integrated circuit. The questions can take the form of an oral presentation on a specific topic, or of simple quantitative problems pertaining to the course program. The ability to link information from different parts of the course to solve the problems is also assessed.

Updated: 27/11/2017 10:33