Upon successful completion of the course, the student:
Knowledge will be assessed in exercises presented during the course and in the final exam.
Upon successful completion of the course, the student:
Skills will be assessed in exercises presented during the course and in the final exam.
Upon successful completion of the course, the student should acquire a technical sensibility on the potentials and limits of present electronic integrated components, as imposed by the current technological constraints.
Behaviors will be assessed in exercises presented during the course and in the final exam.
For effective attendance of the course, the student is required to have:
Teaching method: face-to-face delivered lectures. Delivery is in Italian. A large part of the material will be presented through slides that will be made available through the course web page. For an effective attendance, student presence at the lecture is advised.
Generalities on the fabrication of integrated circuits (ICs). The CMOS technology fabrication sequence. Growth of Silicon crystals, silicon wafer fabrication. Thermal oxidation of silicon, oxide growth models, thin oxides. Semiconductor doping: diffusion, ion implantation. Thin film deposition by Chemical Vapor Deposition (CVD), thermal evaporation, sputtering. Ultraviolet (UV) lithography. Thin film etching: wet etching, plasma etching. Vacuum systems. Clean rooms. Aspects of process integration: CMOS, Bipolar, MEMS technologies. IC Packaging. Characterization: measurement of resistivity, sheet resistance, doping profiles, contact resistance by electrical and non-electrical techniques.
J.D. Plummer, M.D. Deal, P.D. Griffin: Silicon VLSI Technology: Fundamentals, Practice, and Modeling
D.K. Schroeder: Semiconductor Material and Device Characterization
S. Wolf, R.N. Tauber: Silicon Processing for the VLSI Era, Vol. 1: Process Technology.
Method: Final oral exam (100%)
In the final oral exam (30 minutes to 1 hour), the student will be required to present in an organized and clear manner the physical and technical aspects of the most important fabrication steps in a microelectronics fabrication sequence, by exposing the main options available to the process engineer and how each technical choice impacts the overall structure of the final integrated circuit. The questions can take the form of an oral presentation on a specific topic, or of simple quantitative problems pertaining to the course program. The ability to link information from different parts of the course to solve the problems is also assessed.