Scheda programma d'esame
EMBEDDED SYSTEMS
FEDERICO BARONTI
Academic year2016/17
CourseELECTRONIC ENGINEERING
Code311II
Credits9
PeriodSemester 2
LanguageItalian

ModulesAreaTypeHoursTeacher(s)
SISTEMI EMBEDDEDING-INF/01LEZIONI90
FEDERICO BARONTI unimap
Programma non disponibile nella lingua selezionata
Learning outcomes
Knowledge
The student who successfully completes the course: will master an advanced knowledge of the design of embedded systems realized as a programmable CPU, hardware coprocessors and peripheral interfaces to/from actuators/sensors; will be aware of the different design choices and metrics; will be able to explore the designs space and find the most appropriate solution given the specifications to be fulfilled; will have the ability to master the most advanced tools for the design and verification of the hardware and the software parts of the embedded system.
Assessment criteria of knowledge
The student must demonstrate the ability to put into practice and to execute, with critical awareness, the design of an embedded system consisting of a computer and interfaces on a programmable device (System on a Programmable Chip - SoPC). The design includes the definition of the specification, the hardware/software partitioning, the realization of the computing hardware, the realization of the high-level software and the practical realization of a demonstrator, described in a written report.

Methods:

  • Final oral exam
  • Final laboratory practical demonstration
  • Written report

Teaching methods

Delivery: face to face

Learning activities:

  • attending lectures
  • preparation of oral/written report
  • individual study
  • Laboratory work

Attendance: Advised

Teaching methods:

  • Lectures
  • laboratory
  • project work

Syllabus
EMBEDDED SYSTEMS ORGANIZATION. Embedded system definition. RISC processors computer architecture. Memory organization and pipeline. Cache memories. Peripherals. DESIGN TECHNIQUES AND METRICS. Embedded system hardware-software codesign. Design space exploration. Comparative evaluation of discrete CPU, CPU integrated on programmable logic, dedicated ASIC. SYSTEM ON A PROGRAMMABLE CHIP (SOPC). NIOS II architecture. Parallel port, interval timer, JTAG UART interfaces. The Avalon system interconnect fabric. The SoPC builder tools for the hardware design of the embedded system. SOFTWARE PROGRAMMING. Recalls on C language. Layered software organization: device drivers, hardware abstraction layer, C standard libraries. Interrupt handling and code optimization.
Bibliography
Recommended reading includes the following works: C.Hamacher , Z.Vranesic, S.Zaky, N.Manjikian, Computer Organization and Embedded Systems, 6th Ed. Mc Graw-Hill. Altera documentation (www.altera.com): Nios II Processor Reference Handbook, Embedded Peripherals IP User Guide, Nios II Software Developer's Handbook, Avalon Interface Specification.
Work placement
A qualifying part of the course is the lab activity in which the design of an embedded system realized as a System on a Programmable Chip will be carried out. The lab activity will be executed with advanced CAD tools for the hardware design and the software implementation. The practical demonstration of the embedded system realized on a programmable electronic board is the final outcome of the lab activities.
Updated: 14/11/2016 17:27