Scheda programma d'esame
ARCHITETTURA DEGLI ELABORATORI
MARCO DANELUTTO
Anno accademico2017/18
CdSINFORMATICA
Codice267AA
CFU9
PeriodoPrimo semestre
LinguaItaliano

ModuliSettore/iTipoOreDocente/i
ARCHITETTURE DEGLI ELABORATORIINF/01LEZIONI72
MARCO DANELUTTO unimap
Obiettivi di apprendimento
Learning outcomes
Conoscenze

Students are expected to achieve a good knowledge of computer architecture scientific and technological foundations in order to understand the characteristics of computers at various levels, and their relations with programming tools, as well as structuring of systems via concurrent and cooperating modules.

Knowledge

Students are expected to achieve a good knowledge of computer architecture scientific and technological foundations in order to understand the characteristics of computers at various levels, and their relations with programming tools, as well as structuring of systems via concurrent and cooperating modules.

Modalità di verifica delle conoscenze

The student should demonstrate the ability to properly correlating the various issues studied in the course in order to solve problem solving tasks in the definition and design of simple system modules and program performance evaluation. The written part will also assess the ability to present in a clear way a report of the solved problem.

Methods:

  • Final oral exam
  • Final written exam
  • Periodic written tests

Further information:
Two midterms are provided: if taken with sufficient rating, they replace the written part of the exam.

Assessment criteria of knowledge

The student should demonstrate the ability to properly correlating the various issues studied in the course in order to solve problem solving tasks in the definition and design of simple system modules and program performance evaluation. The written part will also assess the ability to present in a clear way a report of the solved problem.

Methods:

  • Final oral exam
  • Final written exam
  • Periodic written tests

Further information:
Two midterms are provided: if taken with sufficient rating, they replace the written part of the exam.

Capacità

Students will learn

  • how to design simple combinatoric and sequential networks,
  • how to implement hardware units implementing simple operations
  • and how to write simple assembler programs in a subset of the RISC instruction set called D-RISC
Skills

Students will learn

  • how to design simple combinatoric and sequential networks,
  • how to implement hardware units implementing simple operations
  • and how to write simple assembler programs in a subset of the RISC instruction set called D-RISC
Modalità di verifica delle capacità

Student skills will be evaluated through home works assigned during the lessons, thourgh the mid term essays, and through the written and oral exams at the end of the course. 

Assessment criteria of skills

Student skills will be evaluated through home works assigned during the lessons, thourgh the mid term essays, and through the written and oral exams at the end of the course. 

Prerequisiti (conoscenze iniziali)

Basic knolwedge about high level imperative programming languages are required

Prerequisites

Basic knolwedge about high level imperative programming languages are required

Indicazioni metodologiche

Delivery: face to face

Learning activities:

  • attending lectures
  • participation in seminar
  • participation in discussions
  • individual study

Attendance: Advised

Teaching methods:

  • Lectures
  • Seminar
  • Task-based learning/problem-based learning/inquiry-based learning
Teaching methods

Delivery: face to face

Learning activities:

  • attending lectures
  • participation in seminar
  • participation in discussions
  • individual study

Attendance: Advised

Teaching methods:

  • Lectures
  • Seminar
  • Task-based learning/problem-based learning/inquiry-based learning
Programma (contenuti dell'insegnamento)
  1. Computer systems fundamentals
  2. Firmware level
  3. Assembler machine level
  4. Process level
  5. Elementary processor architecture and performance
  6. Memory hierarchies
  7. Fundamentals of parallel systems structuring and evaluation
  8. Instruction level parallelism CPUs
  9. Introduction to multiprocessors
Syllabus
  1. Computer systems fundamentals
  2. Firmware level
  3. Assembler machine level
  4. Process level
  5. Elementary processor architecture and performance
  6. Memory hierarchies
  7. Fundamentals of parallel systems structuring and evaluation
  8. Instruction level parallelism CPUs
  9. Introduction to multiprocessors
Bibliografia e materiale didattico

Text book:

  • M. Vanneschi, Architettura degli Elaboratori. Pisa University Press, 2013.

Other recommended readings:

  • D.A. Patterson, J.L. Hennessy, Computer Organization & Design – The Hardware/Software Interface. Morgan Kaufmann Publishers. - G. B. Gerace, La Logica dei Sistemi di Elaborazione. Editori Riuniti.
Bibliography

Text book:

  • M. Vanneschi, Architettura degli Elaboratori. Pisa University Press, 2013.

Other recommended readings:

  • D.A. Patterson, J.L. Hennessy, Computer Organization & Design – The Hardware/Software Interface. Morgan Kaufmann Publishers. - G. B. Gerace, La Logica dei Sistemi di Elaborazione. Editori Riuniti.
Indicazioni per non frequentanti

An audio/video record of the lesson given is available on WEB. These recordings may be used, in conjunction with the text book and professor's notes, to recover missed lessons or to prepare the exam completely off line.

Non-attending students info

An audio/video record of the lesson given is available on WEB. These recordings may be used, in conjunction with the text book and professor's notes, to recover missed lessons or to prepare the exam completely off line.

Modalità d'esame

Written + Oral

Assessment methods

Written + Oral

Ultimo aggiornamento 14/03/2018 10:29